Freescale Semiconductor /MKV58F24 /SystemControl /MVFR0

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Interpret as MVFR0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0A_SIMD0 (0000)SINGLE_PRECISION 0 (0000)DOUBLE_PRECISION 0 (0000)FP_EXCEPTION_TRAPPING 0DIVIDE0SQUARE_ROOT 0 (0000)SHORT_VECTORS 0FP_ROUNDING_MODES

FP_EXCEPTION_TRAPPING=0000, SHORT_VECTORS=0000, DOUBLE_PRECISION=0000, SINGLE_PRECISION=0000

Description

Media and FP Feature Register 0

Fields

A_SIMD

Indicates the size of the FP register bank.

1 (1): Supported, 16 x 64-bit registers.

SINGLE_PRECISION

Indicates the hardware support for FP single-precision operations.

0 (0000): Not supported.

2 (0010): Supported.

DOUBLE_PRECISION

Indicates the hardware support for FP double-precision operations.

0 (0000): Not supported.

2 (0010): Supported.

FP_EXCEPTION_TRAPPING

Indicates whether the FP hardware implementation supports exception trapping.

0 (0000): Not supported in ARMv7-M.

DIVIDE

Indicates whether the FP hardware implementation supports exception trapping.

1 (0001): Supported.

SQUARE_ROOT

Indicates the hardware support for FP square root operations.

1 (0001): Supported.

SHORT_VECTORS

Indicates the hardware support for FP square root operations.

0 (0000): Not supported in ARMv7-M.

FP_ROUNDING_MODES

Indicates the rounding modes supported by the FP floating-point hardware.

1 (0001): All rounding modes supported.

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